Technical Document
Specifications
Brand
DiodesZetexLogic Function
NOR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-553
Pin Count
5
Logic Family
LVC
Input Type
CMOS
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns @ 2.7 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Output Type
Push-Pull
Length
1.7mm
Height
0.62mm
Width
1.25mm
Dimensions
1.7 x 1.25 x 0.62mm
Country of Origin
China
Product details
74LVC1G Family, Diodes Inc
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Stock information temporarily unavailable.
42.70 MOP
0.853 MOP Each (In a Pack of 50) (ex VAT)
Standard
50
42.70 MOP
0.853 MOP Each (In a Pack of 50) (ex VAT)
Stock information temporarily unavailable.
Standard
50
| quantity | Unit price | Per Pack |
|---|---|---|
| 50 - 950 | 0.853 MOP | 42.66 MOP |
| 1000 - 1950 | 0.833 MOP | 41.63 MOP |
| 2000+ | 0.818 MOP | 40.91 MOP |
Technical Document
Specifications
Brand
DiodesZetexLogic Function
NOR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-553
Pin Count
5
Logic Family
LVC
Input Type
CMOS
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns @ 2.7 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Output Type
Push-Pull
Length
1.7mm
Height
0.62mm
Width
1.25mm
Dimensions
1.7 x 1.25 x 0.62mm
Country of Origin
China
Product details
74LVC1G Family, Diodes Inc
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS


