Technical Document
Specifications
Brand
onsemiLogic Family
NLU
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
CMOS
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
UDFN
Pin Count
6
Maximum High Level Output Current
-8mA
Maximum Low Level Output Current
8mA
Maximum Propagation Delay Time @ Maximum CL
14.5 ns @ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
1.2 x 1 x 0.5mm
Minimum Operating Temperature
-55 °C
Maximum Operating Temperature
+125 °C
Length
1.2mm
Height
0.5mm
Width
1mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
NLU Series, ON Semiconductor
Offering small package sizes, the NLU series from ON Semiconductors are a range of advanced CMOS high−speed non−inverting buffer. These CMOS logic gates provide protection when voltages of up to 7V are applied.
Low Power Dissipation
Power down protection provided on inputs
Balanced Propagation Delays
Ultra−Small Packages
NL Series Logic Family, ON Semiconductor
P.O.A.
Each (In a Pack of 25) (ex VAT)
Standard
25
P.O.A.
Each (In a Pack of 25) (ex VAT)
Stock information temporarily unavailable.
Standard
25
Stock information temporarily unavailable.
Technical Document
Specifications
Brand
onsemiLogic Family
NLU
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
CMOS
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
UDFN
Pin Count
6
Maximum High Level Output Current
-8mA
Maximum Low Level Output Current
8mA
Maximum Propagation Delay Time @ Maximum CL
14.5 ns @ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
1.2 x 1 x 0.5mm
Minimum Operating Temperature
-55 °C
Maximum Operating Temperature
+125 °C
Length
1.2mm
Height
0.5mm
Width
1mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
NLU Series, ON Semiconductor
Offering small package sizes, the NLU series from ON Semiconductors are a range of advanced CMOS high−speed non−inverting buffer. These CMOS logic gates provide protection when voltages of up to 7V are applied.
Low Power Dissipation
Power down protection provided on inputs
Balanced Propagation Delays
Ultra−Small Packages


