Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Product Type
Flip Flop IC
Input Type
Single Ended
Output Type
Differential
Polarity
Non-Inverting, Inverting
Mount Type
Surface Mount
Minimum Supply Voltage
1.65V
Package Type
SOIC
Maximum Supply Voltage
3.6V
Pin Count
16
Minimum Operating Temperature
-40°C
Trigger Type
Negative Edge
Flip-Flop Type
JK Type
Number of Elements per Chip
2
Maximum Operating Temperature
85°C
Width
3.91 mm
Height
1.58mm
Length
9.9mm
Series
74LVC
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
67.40 MOP
6.739 MOP Each (In a Pack of 10) (ex VAT)
10
67.40 MOP
6.739 MOP Each (In a Pack of 10) (ex VAT)
Stock information temporarily unavailable.
10
| quantity | Unit price | Per Pack |
|---|---|---|
| 10 - 10 | 6.739 MOP | 67.40 MOP |
| 20 - 90 | 6.606 MOP | 66.06 MOP |
| 100 - 190 | 6.482 MOP | 64.82 MOP |
| 200 - 390 | 6.348 MOP | 63.48 MOP |
| 400+ | 6.224 MOP | 62.24 MOP |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Product Type
Flip Flop IC
Input Type
Single Ended
Output Type
Differential
Polarity
Non-Inverting, Inverting
Mount Type
Surface Mount
Minimum Supply Voltage
1.65V
Package Type
SOIC
Maximum Supply Voltage
3.6V
Pin Count
16
Minimum Operating Temperature
-40°C
Trigger Type
Negative Edge
Flip-Flop Type
JK Type
Number of Elements per Chip
2
Maximum Operating Temperature
85°C
Width
3.91 mm
Height
1.58mm
Length
9.9mm
Series
74LVC
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22


