Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
Open Drain
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 3.3 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
34.20 MOP
6.843 MOP Each (Supplied on a Reel) (ex VAT)
Production pack (Reel)
5
34.20 MOP
6.843 MOP Each (Supplied on a Reel) (ex VAT)
Stock information temporarily unavailable.
Production pack (Reel)
5
| quantity | Unit price | Per Reel |
|---|---|---|
| 5 - 60 | 6.843 MOP | 34.21 MOP |
| 65 - 120 | 6.657 MOP | 33.28 MOP |
| 125+ | 6.554 MOP | 32.77 MOP |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
Open Drain
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 3.3 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
