Texas Instruments 1 Schmitt Trigger Input Inverter, 5-Pin SOT-23
Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Inverter
Logic Function
Inverter
Input Type
Schmitt Trigger
Output Type
CMOS, Push Pull
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ CL
13ns
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Supply Voltage
1.65V
Mount Type
Surface
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Minimum Operating Temperature
-40°C
Logic Family
LVC
Maximum Operating Temperature
85°C
Width
1.6 mm
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Series
SN74LVC1G14
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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Stock information temporarily unavailable.
1,518.30 MOP
0.506 MOP Each (On a Reel of 3000) (ex VAT)
3000
1,518.30 MOP
0.506 MOP Each (On a Reel of 3000) (ex VAT)
Stock information temporarily unavailable.
3000
| quantity | Unit price | Per Reel |
|---|---|---|
| 3000 - 3000 | 0.506 MOP | 1,518.34 MOP |
| 6000+ | 0.493 MOP | 1,480.42 MOP |
Ideate. Create. Collaborate
JOIN FOR FREE
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Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Inverter
Logic Function
Inverter
Input Type
Schmitt Trigger
Output Type
CMOS, Push Pull
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ CL
13ns
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Supply Voltage
1.65V
Mount Type
Surface
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Minimum Operating Temperature
-40°C
Logic Family
LVC
Maximum Operating Temperature
85°C
Width
1.6 mm
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Series
SN74LVC1G14
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products