Texas Instruments SN74LVC1G32DBVR, 1 2-Input OR Logic Gate, 5-Pin SOT-23
Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Logic Gate
Logic Function
OR
Mount Type
Surface
Number of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Input Type
CMOS
Maximum Propagation Delay Time @ CL
4.5ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Minimum Supply Voltage
1.65V
Width
1.6 mm
Series
SN74
Maximum Supply Voltage
5.5V
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Maximum Low Level Output Current
32mA
Automotive Standard
No
Output Type
CMOS
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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Stock information temporarily unavailable.
13.60 MOP
0.544 MOP Each (In a Pack of 25) (ex VAT)
25
13.60 MOP
0.544 MOP Each (In a Pack of 25) (ex VAT)
Stock information temporarily unavailable.
25
| quantity | Unit price | Per Pack |
|---|---|---|
| 25 - 725 | 0.544 MOP | 13.60 MOP |
| 750 - 1475 | 0.532 MOP | 13.29 MOP |
| 1500+ | 0.519 MOP | 12.98 MOP |
Ideate. Create. Collaborate
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Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Logic Gate
Logic Function
OR
Mount Type
Surface
Number of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Input Type
CMOS
Maximum Propagation Delay Time @ CL
4.5ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Minimum Supply Voltage
1.65V
Width
1.6 mm
Series
SN74
Maximum Supply Voltage
5.5V
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Maximum Low Level Output Current
32mA
Automotive Standard
No
Output Type
CMOS
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products