Technical Documents
Specifications
Product Type
Function Generator IC
Mount Type
Surface
Package Type
QFN
Minimum Supply Voltage
1.71V
Pin Count
24
Maximum Supply Voltage
3.63V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Length
4mm
Height
0.85mm
Standards/Approvals
No
Series
Si5338A
Automotive Standard
No
Maximum Output Frequency
710MHz
Country of Origin
Taiwan, Province Of China
Product Details
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
Stock information temporarily unavailable.
211.10 MOP
211.15 MOP Each (Supplied in a Tray) (ex VAT)
Production pack (Tray)
1
211.10 MOP
211.15 MOP Each (Supplied in a Tray) (ex VAT)
Stock information temporarily unavailable.
Production pack (Tray)
1
| quantity | Unit price |
|---|---|
| 1 - 18 | 211.15 MOP |
| 19 - 37 | 207.44 MOP |
| 38+ | 203.63 MOP |
Technical Documents
Specifications
Product Type
Function Generator IC
Mount Type
Surface
Package Type
QFN
Minimum Supply Voltage
1.71V
Pin Count
24
Maximum Supply Voltage
3.63V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Length
4mm
Height
0.85mm
Standards/Approvals
No
Series
Si5338A
Automotive Standard
No
Maximum Output Frequency
710MHz
Country of Origin
Taiwan, Province Of China
Product Details
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.