技術文件
規格
Brand
MicrochipProduct Type
MOSFET Arrays
Channel Type
P-Channel, N channel
Maximum Continuous Drain Current Id
2A
Maximum Drain Source Voltage Vds
200V
Package Type
VDFN
Series
TC6320
Mount Type
Surface
Pin Count
8
Channel Mode
Enhancement
Forward Voltage Vf
1.8V
Transistor Configuration
Complementary Pair
Length
0.40mm
Height
1.35mm
Standards/Approvals
RoHS Certificate of Compliance
Number of Elements per Chip
1
Automotive Standard
No
原產地
Thailand
產品詳情
The Microchip High-voltage, low-threshold N-channel and P-channel MOSFETs in 8-lead VDFN and SOIC packages feature integrated gate-to-source resistors and gate-to-source Zener diode clamps, making them ideal for high-voltage pulser applications. This complementary, high-speed, high-voltage, gate-clamped N-channel and P-channel MOSFET pair uses an advanced vertical DMOS structure and a proven silicon gate manufacturing process. The combination offers the power handling capabilities of bipolar transistors along with the high input impedance and positive temperature coefficient typical of MOS devices. As with all MOS structures, these devices are free from thermal runaway and thermally induced secondary breakdown.
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53,206.00 MOP
16.123 MOP Each (On a Reel of 3300) (不含稅)
3300
53,206.00 MOP
16.123 MOP Each (On a Reel of 3300) (不含稅)
暫時無法取得庫存資訊。
3300
醞釀。 創造。 合作
免費加入
無隱藏費用！
技術文件
規格
Brand
MicrochipProduct Type
MOSFET Arrays
Channel Type
P-Channel, N channel
Maximum Continuous Drain Current Id
2A
Maximum Drain Source Voltage Vds
200V
Package Type
VDFN
Series
TC6320
Mount Type
Surface
Pin Count
8
Channel Mode
Enhancement
Forward Voltage Vf
1.8V
Transistor Configuration
Complementary Pair
Length
0.40mm
Height
1.35mm
Standards/Approvals
RoHS Certificate of Compliance
Number of Elements per Chip
1
Automotive Standard
No
原產地
Thailand
產品詳情
The Microchip High-voltage, low-threshold N-channel and P-channel MOSFETs in 8-lead VDFN and SOIC packages feature integrated gate-to-source resistors and gate-to-source Zener diode clamps, making them ideal for high-voltage pulser applications. This complementary, high-speed, high-voltage, gate-clamped N-channel and P-channel MOSFET pair uses an advanced vertical DMOS structure and a proven silicon gate manufacturing process. The combination offers the power handling capabilities of bipolar transistors along with the high input impedance and positive temperature coefficient typical of MOS devices. As with all MOS structures, these devices are free from thermal runaway and thermally induced secondary breakdown.
醞釀。 創造。 合作
免費加入
無隱藏費用！
